1. Field of the Invention
This invention relates generally to the field of integrated circuit design and, more particularly, to the design of voltage regulator circuits.
2. Description of the Related Art
Voltage regulators are electrical regulators generally designed to automatically maintain constant voltage levels, and may operate according to electromechanical principles, or by using passive/active electronic components. In some designs, voltage regulators may be used to regulate one or more AC and/or DC voltages, performing the voltage regulation by comparing an actual output voltage to some internal fixed reference voltage. The difference between the voltages is typically amplified and used as a control signal into a control circuit configured to maintain a substantially constant output voltage, essentially forming a negative feedback control loop. If the output voltage is too low, the control circuit operates to generate a higher voltage. If the output voltage is too high, the control circuit operates to generate a lower voltage. This allows the output voltage to remain essentially constant. In most cases the control loop is carefully designed in order to obtain the desired tradeoff between response speed and stability.
Voltage regulators are often used with digital blocks that enter a low power (sleep) mode, sometimes called a “deep sleep” mode. When a voltage regulator is used in conjunction with a digital block that enters a low power mode, the voltage regulator still generally requires a quiescent current to power the digital block during the sleep mode. Also, a voltage regulator generally has a variation in regulated output voltage, as well as an over supply voltage variation, a corner variation and temperature variation. It is generally desirable for the regulator to deliver an appropriate amount of current when the integrated circuit (IC), which is powered by the voltage regulator, exits a sleep mode to enter a normal mode of operation.
FIG. 1 illustrates one prior art voltage regulator. As shown in FIG. 1, the voltage regulator uses a large resistor divider composed of resistors R1 and R2, coupled to an output stage that consists of a source follower circuit composed of an NMOS device NM0, and an impedance coupled between the output node (providing the regulated output voltage Vddreg and Vss. When constructed on an IC, the voltage regulator in FIG. 1 will typically require a large die size, as the resistor network has to be sufficiently large for the circuit to draw less quiescent current. The circuit shown in FIG. 1 is therefore undesirable, since it uses a large resistor divider network that consumes a substantial area of the chip for reduced quiescent current. Finally, it would be difficult for the source follower circuit to deliver the current to the digital block when the IC returns from deep sleep mode to a normal mode of operation before the voltage regulator (which powers the entire IC) turns on.
FIG. 2 illustrates another prior art voltage regulator. As shown in FIG. 2, an operational amplifier is used as an error amplifier for driving the pass transistor PM0 based on a band gap voltage Vbg and the output of a resistor divider constructed from resistors R1 and R2, which also provides the voltage input to the inverting input of the error amplifier. The bandgap voltage is provided at the non-inverting input of the amplifier, with the pass transistor in this case being a PMOS device. This type of approach represents the traditional way of powering digital/analog blocks in an integrated circuit whenever the external supply to the chip is different from the supply required for powering the digital/analog components. The voltage regulator shown in FIG. 2 is undesirable because it requires a large area, and requires the load/internal capacitor to be stable over the entire range of IL/CL (load current over load capacitance) conditions.
Other corresponding issues related to the prior art will become apparent to one skilled in the art after comparing such prior art with the present invention as described herein.